In integrated circuits (“ICs”), a time-to-digital convertor (TDC) includes a circuit configured to recognize events and provide a digital representation of the timing of the event. For example, a TDC may be configured to output the time of arrival for one or more incoming pulses. TDCs may be used in many different applications in which a time interval between two or more signal pulses (such as, for example, start and stop pulses) needs to be determined.
Current TDC circuits include an inverter as a basic timing unit. Inverters include one or more gates that introduce a gate delay into the circuit. The gate delay of current inverter circuits is defined by limitations of a CMOS process used to fabricate the gates. TDC circuits fabricated using CMOS processes are limited by the capacitance between a device's gate and channel and also by the resistance of the channel and the signal traces. For example, for 10 nm technology, the CMOS process introduces a best-case inverter gate delay in the picosecond range, such as, for example, 10 psecs.